Job Description
In your new job you will:
Define the layout as well as test chips for tapeouts at internal and external fabs and support the process control.
Support the design environment and methodology for the PCM (Process Control Monitor) and reliability macros as well as test chips for different technologies.
Perform jobdeck viewing, checks and releases of PCM and scribeline mask data.
Observe and ensure that change process procedures for layout services and foundry tapeout flows are followed.
Be responsible for the tapeout coordination with various colleagues from preassembly and packaging all along the production flow of the supported CMOS technologies.
Work with engineers, project managers and external foundries and shift priorities accordingly.
Support the technology development and product introduction at every stage of the GDS2Mask flow.
Profile
Your strong multi-cultural communication skills help you to establish long lasting relationships and networks across various internal departments and with external partners. You have a open mind towards new ideas and developments and listen to alternative views in order to find the best possible solutions.
Those qualifications help you to be successful:
University degree in electrical engineering, physics, material sciences or similar – preferably with a focus on semiconductor technology.
At least 3-5 years of semiconductor device design or process experience.
Sound scripting and debugging knowledge (e.g. perl, python) in a Unix environment.
The ability to use EDA tools for layouting and design rule checks.
Excellent English communication skills and at least the willingness to learn German